1. Field of The Invention
The present invention relates to a method and circuitry for obtaining a locally-generated clock signal according to a received biphase modulated signal. The clock signal is utilized to reproduce original binary data from the received biphase modulated signal.
2. Description of the Prior Art
It is known in the art that a digital data communication system using biphase codes (or Manchester codes) features that (a) a data quality is not adversely affected during transmission by transmission paths with low-frequency cutoff characteristics in that the biphase codes include no direct current components and (b) the original data can be converted into the corresponding biphase codes and then reproduced with quite simple circuit arrangements.
Before going into details of prior art, reference will first be made to FIGS. 1 through 3 in order to describe the known principles of converting an original binary NRZ (nonreturn-to-zero) data into the corresponding biphase codes and reproducing the original data.
FIG. 1 is a block diagram showing a simplified known converter or modulator wherein the original binary NRZ data are converted into the corresponding biphase codes. The FIG. 1 arrangement includes an exclusive OR circuit 10, a frequency doubler 12 and a D flip-flop 14. The exclusive OR circuit 10 has one input coupled to receive the original binary NRZ data with a frequency f.sub.0 applied to an input terminal 16, and the other input coupled to receive a clock signal having the frequency f.sub.0 via an input terminal 18. The exclusive OR circuit 10 generates a biphase modulated code sequence by appropriately adjusting the phase relation between the original data and clock signal applied.
FIGS. 2(A) and 2(B) respectively illustrates examples of waveforms of the original NRZ data and clock signal, while FIG. 2(C) illustrates the waveform of the resulting biphase modulated code sequence which is taken from the output of the exclusive OR circuit 10. The D flip-flop 14 and frequency doubler 12 form a wave-shaping section for shaping the waveforms of the output signal of the exclusive OR circuit 10. The wave-shaping section is preferably provided in case the repetition rate of the biphase modulated codes is high but dispensable in the event that the repetition rate is not so high. The biphase modulated signal thus obtained is transmitted to a remote receiver.
FIG. 3 is a block diagram showing a known detector for reproducing the original binary data from the received biphase modulated signal. The FIG. 3 arrangement includes a single D flip-flop 22. The D flip-flop 22 has a data input (D) connected to receive the biphase modulated signal through an input terminal 24, and has a clock input (C) coupled to receive via a terminal 26 a clock signal having the frequency f.sub.0. The waveform of this clock signal is illustrated in FIG. 2(D). It will be appreciated that the D flip-flop 22 reproduces the original binary data at the output (Q) thereof by adjusting the phase relation between the two inputs thereto.
Reference to FIGS. 1 and 3 shows that the original data can be converted into the corresponding biphase codes and then reproduced with quite simple circuit arrangements.
In the FIG. 3 circuit, if the clock signal differs in phase by 180.degree. from the phase depicted in FIG. 2(D), then the polarities of the reproduced original data are reversed. In order to avoid such a problem, it is known in the art that the original binary data is differentially decoded before being converted into the corresponding biphase codes, and are differentially decoded after being reproduced.
As shown in FIG. 3, the clock signal is vital to the reproduction of the original binary data. Since the converter or modulator (FIG. 1) and detector (FIG. 3) are usually separated, it is desirable to transmit data only instead of both data and clock signal. In this instance, it is necessary to extract the clock signal from the received biphase modulated signal.
FIG. 4 is a block diagram showing a known biphase detector for reproducing original (or modulation) data using a clock (or reference) signal which is extracted therein. The FIG. 4 arrangement includes a D flip-flop 30, and a phase-locked loop formed by an exclusive OR circuit 32 and a phase-locked oscillator 34. The oscillator 34 consists of a phase detector 36, a low-pass filter 38, and a voltage-controlled oscillator (VCO) 40. The D flip-flop 30 has one input (data input D) coupled to receive a biphase modulated signal applied to a terminal 42, and the other input (clock input C) coupled to the output of the VCO 40 via a line 44. The D flip-flop 30 is clocked by a locally-generated clock signal applied from the VCO 40, thereby reproducing an original data as was the case depicted in FIG. 3. However, in the situations where the extracted clock signal varies in phase, the output of the flip-flop 30 varies in phase accordingly. In order to overcome this difficulty, the output of the D flip-flop is again biphase modulated at the exclusive OR circuit 32, the output of which is applied to the phase detector 36 to be compared in phase with the output of the incoming biphase modulated signal. The output of the phase detector 36 is fed, via the low-pass filter 38, to the VCO 40 in order to control same. Consequently, the phase of the locally-generated clock signal is synchronized with that of the incoming biphase modulated signal.
Such a decision feedback type demodulator shown in FIG. 4, however, has encountered some drawbacks that the generation of exact clocks may no longer be expected in the situations where the demodulator is initially switched on or there exist bit errors at the flip-flop output caused by transmitted waveform degradations, etc.
The prior art illustrated in FIG. 4 has been disclosed in the PCT patent application which has received International Publication No. of WO 82/02985 and been published on Sept. 2, 1982.